1. Field of the Invention
The invention generally relates to a method for fabricating a flash memory device and, more particularly, to a method for fabricating a flash memory device having a floating gate of a vertical structure.
2. Brief Description of Related Technology
A semiconductor memory device used for storing data can generally be divided into a volatile memory device and a non-volatile memory device. The volatile memory device loses the stored data when the power supply is interrupted, but the non-volatile memory device retains the stored data even when the power supply is interrupted. Therefore, the non-volatile memory device is widely used in applications where power is not always available, the power is occasionally interrupted or lower power consumption is required as in a mobile phone system, a memory card for storing music and/or movie data and other appliances. A typical example is a flash memory device.
The flash memory device is, like a general non-volatile memory device, formed of cell transistors having a stacked gate structure. The stacked gate structure refers to a structure where a tunnel oxide layer, a floating gate, an inter-poly dielectric (IPD), and a control gate are sequentially stacked on a channel region of the cell transistor. The flash memory device of such stacked gate structure uses a coupling ratio, by which a voltage is applied to the floating gate via the inter-poly dielectric when applying a predetermined voltage.
Meanwhile, with miniaturization and weight reduction of electronic appliances, there is an increased demand for a cell of a smaller size, even in the flash memory device. However, it is difficult to meet this demand with current two dimensional cell structure and a novel cell structure thus should be studied.